Modern topics in telecommunications and radio engineering 12 – System on chip technologies for wireless signal processing systems
Max amount of FITech students: 30
Persons without a valid study right to a Finnish university have preference to this course.
The building block of all electronic products are chips which are also known as semiconductors. Single chip integrated circuits which integrate most or all components of a computing system are commonly referred to as System on Chip (SoC). They play a central role in our modern technology driven economies and are essential to all industries, such as the automotive, wireless, defense, finance, smart devices and gaming. The evolution of wireless communications industry to the 6th generation (6G) requires design of wireless signal processing algorithms that takes into account power, performance and area (PPA) improvements in programmable data processing system-on-chip (SoC) platforms.
This course is organised to introduce students’ to issues in system on chip (SoC) architecture, design and verification for wireless data processing systems. A SOC architecture is an ensemble of processors, accelerators, memories, buses, interfaces and interconnects.
The course will cover important topics relating to wireless SoCs which will include but not limited to:
- processing modules
- data transfer engines
- Introduction to SoC architecture
- Memory architecture
- Processor/DSP processor
- Hardware accelerators
- DMA engine
- SoC schedulers
- SoC verification methods
- Data formats and their importance in wireless data processing on SoCs
After the course, the student
- understands structure and operation of systems-on-chip technologies for wireless systems
- can explain main building blocks of a system-on-chip, e.g. processor, dsp processor, on-/off-chip memories, interconnects are introduced
- understands techniques for low power consumption, better area and performance utilisation
- understands fundamental concepts relating to SoC verification and its importance
- is familiar with design tools used in hardware/software driven algorithm acceleration
Exam date is fixed schedule. Lectures are scheduled but will be recorded on Teams so can be viewed later.
During the course there can be home assignments and there will be a final exam (online). Assignments should be completed correctly and the exam will be assessed in scale 0-5.
More information in the University of Oulu study guide.
You can get a digital badge after completing this course.
Further information about the course and studying
Contact person for applications